Description:
Technology Description
The present invention provides methods and systems that address the need for error correction of q-ary systems, i.e., those for which q > 2. In this regard, in one of its aspects the present invention provides systematic q-ary codes for correcting all asymmetric and symmetric errors of limited magnitude. The proposed method gives a simple encoding algorithm for generating the redundant digits from the given information digits and also the decoding algorithm for correcting errors of limited magnitude. The proposed codes require minimum number of check digits and also provide 100% system reliability.
Features & Benefits
- Multi‐level flash memories achieve higher storage capacities
- Prone to limited magnitude errors
- Proposed codes can correct any number of errors and thus achieve 100% system reliability
Applications
- Mobile Device
- Flash Disks
- Embedded Systems
Background of Invention
Classical error control codes have been designed in the past under the assumption of binary symmetric errors. Nevertheless, errors in some VLSI and optical systems are asymmetric in nature. The present invention relates generally to a systems and methods for correcting errors of limited magnitude, and more particularly, but not exclusively, to computer program products and computer-implemented methods for correcting all asymmetric and symmetric errors of limited magnitude. Oregon State University is seeking a company interested in the further development and commercialization of a state-of-the-art error control method for correcting all asymmetric and symmetric errors of limited magnitude.
Status
US Patent No. 8,589,364 B2 and 8,983,921, available for exclusive and non-exclusive licensing
